Integrated CMOS transmitter driver and diversity receiver for indoor optical wireless links

This paper describes the development and reports measured performance of integrated CMOS receiver and transmitter circuits for use in an optical wireless link operating at bit rates up to 310 Mb/s. The receiver presented is an angle-diversity design and consists of multiple sectors each driving an individual pre-amplifier channel. The speed limitation for the receiver circuit is determined substantially by the parasitic capacitance introduced by the photodetector. With current PIN devices this capacitance may be comparatively high, of order several picofarads as a relatively large field of view is required for optical wireless applications. The design incorporates an on-chip selector with external controls determined by the signal level. Signals from detectors that receive optical power above a certain threshold level are passed to a combiner circuit. In the transmitter, in order to avoid limiting the optical performance of the emitter, the electrical response of the LED driver is enhanced by current-peaking and charge-extraction circuitry. A novel timing generator is used to achieve fast rise and fall times. Experimental results confirm that the true performance evaluation of high-speed circuits can be severely hindered by parasitics associated with wire bonding and packaging of chips. Flip-chip packaging, advantageous for its small form factor and low capacitance leading to high speed has been investigated. This has led to the development of fully integrated receiver and transmitter systems where the photodetector and photoemitter devices are directly bonded to supporting CMOS substrates which furnish the necessary support electronics