Wu, Xiaofeng, Chouliaras, V.A., Nunez-Yanez, J.L. and Goodall, Roger M. (2008) A Novel Delta-Sigma Control System Processor and Its VLSI Implementation. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 16 (3). pp. 217-228. ISSN 1063-8210Metadata only available from this repository.
This paper describes a novel control system processor architecture based on DeltaSigma modulation known as the DeltaSigma -CSP. The DeltaSigma -CSP utilizes 1-bit processing which is a new concept in digital control applications with the direct benefit of making multi-bit multiplication operations redundant. A simple conditional-negate-and-add (CNA) unit is instead used for operations in control law implementations. For this reason, the proposed processor has a very small silicon footprint and runs at very high frequencies making it ideal for high-sampling rate, real-time control applications. A number of DeltaSigma -CSP configurations have been implemented as VLSI hard macros in a high-performance 0.13-mum CMOS process and a particular configuration achieved a post-route operating frequency of 355 MHz resulting in a 2.17 MHz sampling rate for a fourth-order control law implementation. Additional results prove that the DeltaSigma -CSP compares very favorably, in terms of silicon area and sampling rates, to two other specialized digital control processing systems, including direct, hardwired implementation of control laws; at the same time, it substantially outperforms software implementations of control laws running on very wide, general-purpose VLIW architectures.
|Subjects:||T Technology > TF Railroad engineering and operation|
|Schools:||School of Computing and Engineering|
|Depositing User:||Cherry Edmunds|
|Date Deposited:||03 Jun 2013 10:57|
|Last Modified:||03 Jun 2013 10:57|
Downloads per month over past year
Repository Staff Only: item control page